INTEL Jobs 2020 : System Validtion Engineer

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INTEL is looking for system validtion engineer and want candidates.

Company Name : INTEL

bank market india

Post Name : System Validtion Engineer

Location : Bengaluru / Bangalore

Education : Any Graduate / Post Graduate

Experience : Freshers

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Candidate Requirement for INTEL Jobs 2020 : System Validtion Engineer

Job Description :job Descriptioncreates, Defines And Develops System Validation Environment And Test Suites. Uses And Applies Emulation And Platform Level Tools And Techniques To Ensure Performance To Spec. Responsible For The Development Of Metho

Job Details for INTEL Jobs 2020 : System Validtion Engineer

Job Description :
Job Description
Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platform level tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Presilicon Validation teams in improving postsilicon test content and providing feedback for future ondie debug features.
Qualifications
“Bachelor’s/Master’s in Hardware Engineering or Electrical/Electronic Engineering or Computer Engineering or Computer Science
Excellent Problem solving skills combined with good communication skills required to work in a high dynamic cross team and cross site environments. Ability to learn fast.
Big Plus if you have any of the following knowledge:
– Usage of any Post-Si debug tools (e.g., logic analyzers, oscilloscopes, things like ChipScope on FPGA’s, etc.)
o C/C++ and Python are the most useful languages for our work.
o VLSI concepts
-Power Management / Reset
o Familiarity with FW (embedded uC) debug
ARC or Extensa LX-series uC preferred
o Knowledge of ARM PM concepts (e.g., P/Q-channel)
o General clocking concepts (PLL’s, RO’s, etc.)
o Ability to debug interactions between different microcontrollers
o Understanding power delivery concepts, VR interactions, etc.
-Mesh / Coherency
o Knowledge of coherence algorithm (MESI, MOESI, MESIF, etc.).
o Experience with SoC fabrics (AXI, ACE or other AMBA protocols).
o Understanding transaction flows through the system.
– PCI Express (we can leverage this expertise for other IO’s, like CXL).
o Familiarity with any generation of the PCI Express specification
o Usage of 3rd party PCIe Analyzers very helpful (Tek, Lecroy, etc.)
-Memory
o Expertise in any DDR technology.
o Usage of 3rd party DDR Analyzers very helpful (Tek, Lecroy, etc.)
– Other useful backgrounds – Security, Virtualization, RAS”Inside this Business Group
The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel’s product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel’s ability to deliver the annual technology platforms in our roadmap.
Legal Disclaimer:
Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intels offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.

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